-- Architecture body --

architecture GT_V of GT is

  component gt_swift_bus
	port (
		TX_CRC_FORCE_VALUE : in std_logic_vector(7 downto 0);
		RXLOSSOFSYNC : out std_logic_vector(1 downto 0);
		RXCLKCORCNT : out std_logic_vector(2 downto 0);
		RXP : in std_ulogic;
		RXN : in std_ulogic;
		GSR : in std_ulogic;
		TXP : out std_ulogic;
		TXN : out std_ulogic;
		CONFIGENABLE : in std_ulogic;
		CONFIGIN : in std_ulogic;
		CONFIGOUT : out std_ulogic;
		ENMCOMMAALIGN : in std_ulogic;
		ENPCOMMAALIGN : in std_ulogic;
		CRC_END_OF_PKT : in std_logic_vector(7 downto 0);
		CRC_FORMAT : in std_logic_vector(1 downto 0);
		CRC_START_OF_PKT : in std_logic_vector(7 downto 0);
		CHAN_BOND_LIMIT : in std_logic_vector(4 downto 0);
		REFCLK : in std_ulogic;
		REFCLK2 : in std_ulogic;
		REFCLKSEL : in std_ulogic;
		RXUSRCLK : in std_ulogic;
		TXUSRCLK : in std_ulogic;
		RXUSRCLK2 : in std_ulogic;
		TXUSRCLK2 : in std_ulogic;
		RXRESET : in std_ulogic;
		TXRESET : in std_ulogic;
		POWERDOWN : in std_ulogic;
		LOOPBACK : in std_logic_vector(1 downto 0);
		TXDATA : in std_logic_vector(31 downto 0);
		RX_LOSS_OF_SYNC_FSM : in std_ulogic;
		RX_LOS_INVALID_INCR : in std_logic_vector(2 downto 0);
		RX_LOS_THRESHOLD : in std_logic_vector(2 downto 0);
		TXCHARDISPMODE : in std_logic_vector(3 downto 0);
		TXCHARDISPVAL : in std_logic_vector(3 downto 0);
		TXCHARISK : in std_logic_vector(3 downto 0);
		TXBYPASS8B10B : in std_logic_vector(3 downto 0);
		TXPOLARITY : in std_ulogic;
		TXINHIBIT : in std_ulogic;
		ENCHANSYNC : in std_ulogic;
		RXPOLARITY : in std_ulogic;
		CHBONDI : in std_logic_vector(3 downto 0);
		RXRECCLK : out std_ulogic;
		TXBUFERR : out std_ulogic;
		TXFORCECRCERR : in std_ulogic;
		TXRUNDISP : out std_logic_vector(3 downto 0);
		TXKERR : out std_logic_vector(3 downto 0);
		RXREALIGN : out std_ulogic;
		RXCOMMADET : out std_ulogic;
		RXCHECKINGCRC : out std_ulogic;
		RXCRCERR : out std_ulogic;
		RXDATA : out std_logic_vector(31 downto 0);
		RXCHARISCOMMA : out std_logic_vector(3 downto 0);
		RXCHARISK : out std_logic_vector(3 downto 0);
		RXNOTINTABLE : out std_logic_vector(3 downto 0);
		RXDISPERR : out std_logic_vector(3 downto 0);
		RXRUNDISP : out std_logic_vector(3 downto 0);
		RXBUFSTATUS : out std_logic_vector(1 downto 0);
		CHBONDO : out std_logic_vector(3 downto 0);
		CHBONDDONE : out std_ulogic;
		TX_PREEMPHASIS : in std_logic_vector(1 downto 0);
		TX_DIFF_CTRL : in std_logic_vector(2 downto 0);
		TERMINATION_IMP : in std_ulogic;
		SERDES_10B : in std_ulogic;
		ALIGN_COMMA_MSB : in std_ulogic;
		PCOMMA_DETECT : in std_ulogic;
		MCOMMA_DETECT : in std_ulogic;
		PCOMMA_10B_VALUE : in std_logic_vector(0 to 9);
		MCOMMA_10B_VALUE : in std_logic_vector(0 to 9);
		COMMA_10B_MASK : in std_logic_vector(0 to 9);
		DEC_PCOMMA_DETECT : in std_ulogic;
		DEC_MCOMMA_DETECT : in std_ulogic;
		DEC_VALID_COMMA_ONLY : in std_ulogic;
		RX_DECODE_USE : in std_ulogic;
		RX_BUFFER_USE : in std_ulogic;
		TX_BUFFER_USE : in std_ulogic;
		CLK_CORRECT_USE : in std_ulogic;
		CLK_COR_SEQ_LEN : in std_logic_vector(1 downto 0);
		CLK_COR_INSERT_IDLE_FLAG : in std_ulogic;
		CLK_COR_KEEP_IDLE : in std_ulogic;
		CLK_COR_REPEAT_WAIT : in std_logic_vector(4 downto 0);
		CLK_COR_SEQ_1_1 : in std_logic_vector(10 downto 0);
		CLK_COR_SEQ_1_2 : in std_logic_vector(10 downto 0);
		CLK_COR_SEQ_1_3 : in std_logic_vector(10 downto 0);
		CLK_COR_SEQ_1_4 : in std_logic_vector(10 downto 0);
		CLK_COR_SEQ_2_USE : in std_ulogic;
		CLK_COR_SEQ_2_1 : in std_logic_vector(10 downto 0);
		CLK_COR_SEQ_2_2 : in std_logic_vector(10 downto 0);
		CLK_COR_SEQ_2_3 : in std_logic_vector(10 downto 0);
		CLK_COR_SEQ_2_4 : in std_logic_vector(10 downto 0);
		CHAN_BOND_MODE : in std_logic_vector(1 downto 0);
		CHAN_BOND_SEQ_LEN : in std_logic_vector(1 downto 0);
		CHAN_BOND_SEQ_1_1 : in std_logic_vector(10 downto 0);
		CHAN_BOND_SEQ_1_2 : in std_logic_vector(10 downto 0);
		CHAN_BOND_SEQ_1_3 : in std_logic_vector(10 downto 0);
		CHAN_BOND_SEQ_1_4 : in std_logic_vector(10 downto 0);
		CHAN_BOND_SEQ_2_USE : in std_ulogic;
		CHAN_BOND_SEQ_2_1 : in std_logic_vector(10 downto 0);
		CHAN_BOND_SEQ_2_2 : in std_logic_vector(10 downto 0);
		CHAN_BOND_SEQ_2_3 : in std_logic_vector(10 downto 0);
		CHAN_BOND_SEQ_2_4 : in std_logic_vector(10 downto 0);
		CHAN_BOND_WAIT : in std_logic_vector(3 downto 0);
		CHAN_BOND_OFFSET : in std_logic_vector(3 downto 0);
		TX_CRC_USE : in std_ulogic;
		RX_CRC_USE : in std_ulogic;
		CHAN_BOND_ONE_SHOT : in std_ulogic;
		RX_DATA_WIDTH : in std_logic_vector(1 downto 0);
		TX_DATA_WIDTH : in std_logic_vector(1 downto 0);
		BREFCLK : in std_ulogic;
		BREFCLK2 : in std_ulogic;
		REF_CLK_V_SEL : in std_ulogic
	);    
  end component;
-- Attribute-to-Cell mapping signals
        signal   ALIGN_COMMA_MSB_BINARY  :  std_ulogic;
        signal   CHAN_BOND_LIMIT_BINARY  :  std_logic_vector(4 downto 0);
        signal   CHAN_BOND_MODE_BINARY  :  std_logic_vector(1 downto 0);
        signal   CHAN_BOND_OFFSET_BINARY  :  std_logic_vector(3 downto 0);
        signal   CHAN_BOND_ONE_SHOT_BINARY  :  std_ulogic;
        signal   CHAN_BOND_SEQ_1_1_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CHAN_BOND_SEQ_1_1);
        signal   CHAN_BOND_SEQ_1_2_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CHAN_BOND_SEQ_1_2);
        signal   CHAN_BOND_SEQ_1_3_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CHAN_BOND_SEQ_1_3);
        signal   CHAN_BOND_SEQ_1_4_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CHAN_BOND_SEQ_1_4);
        signal   CHAN_BOND_SEQ_2_1_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CHAN_BOND_SEQ_2_1);
        signal   CHAN_BOND_SEQ_2_2_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CHAN_BOND_SEQ_2_2);
        signal   CHAN_BOND_SEQ_2_3_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CHAN_BOND_SEQ_2_3);
        signal   CHAN_BOND_SEQ_2_4_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CHAN_BOND_SEQ_2_4);
        signal   CHAN_BOND_SEQ_2_USE_BINARY  :  std_ulogic;
        signal   CHAN_BOND_SEQ_LEN_BINARY  :  std_logic_vector(1 downto 0);
        signal   CHAN_BOND_WAIT_BINARY  :  std_logic_vector(3 downto 0);
        signal   CLK_COR_INSERT_IDLE_FLAG_BINARY  :  std_ulogic;
        signal   CLK_COR_KEEP_IDLE_BINARY  :  std_ulogic;
        signal   CLK_COR_REPEAT_WAIT_BINARY  :  std_logic_vector(4 downto 0);
        signal   CLK_COR_SEQ_1_1_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CLK_COR_SEQ_1_1);
        signal   CLK_COR_SEQ_1_2_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CLK_COR_SEQ_1_2);
        signal   CLK_COR_SEQ_1_3_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CLK_COR_SEQ_1_3);
        signal   CLK_COR_SEQ_1_4_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CLK_COR_SEQ_1_4);
        signal   CLK_COR_SEQ_2_1_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CLK_COR_SEQ_2_1);
        signal   CLK_COR_SEQ_2_2_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CLK_COR_SEQ_2_2);
        signal   CLK_COR_SEQ_2_3_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CLK_COR_SEQ_2_3);
        signal   CLK_COR_SEQ_2_4_BINARY  :  std_logic_vector(10 downto 0) := To_StdLogicVector(CLK_COR_SEQ_2_4);
        signal   CLK_COR_SEQ_2_USE_BINARY  :  std_ulogic;
        signal   CLK_COR_SEQ_LEN_BINARY  :  std_logic_vector(1 downto 0);
        signal   CLK_CORRECT_USE_BINARY  :  std_ulogic;
        signal   COMMA_10B_MASK_BINARY  :  std_logic_vector(9 downto 0) := To_StdLogicVector(COMMA_10B_MASK);
        signal   CRC_END_OF_PKT_BINARY  :  std_logic_vector(7 downto 0);
        signal   CRC_FORMAT_BINARY  :  std_logic_vector(1 downto 0);
        signal   CRC_START_OF_PKT_BINARY  :  std_logic_vector(7 downto 0);
        signal   DEC_MCOMMA_DETECT_BINARY  :  std_ulogic;
        signal   DEC_PCOMMA_DETECT_BINARY  :  std_ulogic;
        signal   DEC_VALID_COMMA_ONLY_BINARY  :  std_ulogic;
        signal   MCOMMA_10B_VALUE_BINARY  :  std_logic_vector(9 downto 0) := To_StdLogicVector(MCOMMA_10B_VALUE);
        signal   MCOMMA_DETECT_BINARY  :  std_ulogic;
        signal   PCOMMA_10B_VALUE_BINARY  :  std_logic_vector(9 downto 0) := To_StdLogicVector(PCOMMA_10B_VALUE);
        signal   PCOMMA_DETECT_BINARY  :  std_ulogic;
        signal   REF_CLK_V_SEL_BINARY  :  std_ulogic;
        signal   RX_BUFFER_USE_BINARY  :  std_ulogic;
        signal   RX_CRC_USE_BINARY  :  std_ulogic;
        signal   RX_DATA_WIDTH_BINARY  :  std_logic_vector(1 downto 0);
        signal   RX_DECODE_USE_BINARY  :  std_ulogic;
        signal   RX_LOS_INVALID_INCR_BINARY  :  std_logic_vector(2 downto 0);
        signal   RX_LOS_THRESHOLD_BINARY  :  std_logic_vector(2 downto 0);
        signal   RX_LOSS_OF_SYNC_FSM_BINARY  :  std_ulogic;
        signal   SERDES_10B_BINARY  :  std_ulogic;
        signal   TERMINATION_IMP_BINARY  :  std_ulogic;
        signal   TX_BUFFER_USE_BINARY  :  std_ulogic;
        signal   TX_CRC_FORCE_VALUE_BINARY  :  std_logic_vector(7 downto 0) := To_StdLogicVector(TX_CRC_FORCE_VALUE);
        signal   TX_CRC_USE_BINARY  :  std_ulogic;
        signal   TX_DATA_WIDTH_BINARY  :  std_logic_vector(1 downto 0);
        signal   TX_DIFF_CTRL_BINARY  :  std_logic_vector(2 downto 0);
        signal   TX_PREEMPHASIS_BINARY  :  std_logic_vector(1 downto 0);

-- Input/Output Pin signals
        signal   CHBONDDONE_out  :  std_ulogic;
        signal   CHBONDO_out  :  std_logic_vector(3 downto 0);
        signal   CONFIGOUT_out  :  std_ulogic;
        signal   RXBUFSTATUS_out  :  std_logic_vector(1 downto 0);
        signal   RXCHARISCOMMA_out  :  std_logic_vector(3 downto 0);
        signal   RXCHARISK_out  :  std_logic_vector(3 downto 0);
        signal   RXCHECKINGCRC_out  :  std_ulogic;
        signal   RXCLKCORCNT_out  :  std_logic_vector(2 downto 0);
        signal   RXCOMMADET_out  :  std_ulogic;
        signal   RXCRCERR_out  :  std_ulogic;
        signal   RXDATA_out  :  std_logic_vector(31 downto 0);
        signal   RXDISPERR_out  :  std_logic_vector(3 downto 0);
        signal   RXLOSSOFSYNC_out  :  std_logic_vector(1 downto 0);
        signal   RXNOTINTABLE_out  :  std_logic_vector(3 downto 0);
        signal   RXREALIGN_out  :  std_ulogic;
        signal   RXRECCLK_out  :  std_ulogic;
        signal   RXRUNDISP_out  :  std_logic_vector(3 downto 0);
        signal   TXBUFERR_out  :  std_ulogic;
        signal   TXKERR_out  :  std_logic_vector(3 downto 0);
        signal   TXN_out  :  std_ulogic;
        signal   TXP_out  :  std_ulogic;
        signal   TXRUNDISP_out  :  std_logic_vector(3 downto 0);

        signal   BREFCLK_ipd  :  std_ulogic;
        signal   BREFCLK2_ipd  :  std_ulogic;
        signal   CHBONDI_ipd  :  std_logic_vector(3 downto 0);
        signal   CONFIGENABLE_ipd  :  std_ulogic;
        signal   CONFIGIN_ipd  :  std_ulogic;
        signal   ENCHANSYNC_ipd  :  std_ulogic;
        signal   ENMCOMMAALIGN_ipd  :  std_ulogic;
        signal   ENPCOMMAALIGN_ipd  :  std_ulogic;
        signal   LOOPBACK_ipd  :  std_logic_vector(1 downto 0);
        signal   POWERDOWN_ipd  :  std_ulogic;
        signal   REFCLK_ipd  :  std_ulogic;
        signal   REFCLK2_ipd  :  std_ulogic;
        signal   REFCLKSEL_ipd  :  std_ulogic;
        signal   RXN_ipd  :  std_ulogic;
        signal   RXP_ipd  :  std_ulogic;
        signal   RXPOLARITY_ipd  :  std_ulogic;
        signal   RXRESET_ipd  :  std_ulogic;
        signal   RXUSRCLK_ipd  :  std_ulogic;
        signal   RXUSRCLK2_ipd  :  std_ulogic;
        signal   TXBYPASS8B10B_ipd  :  std_logic_vector(3 downto 0);
        signal   TXCHARDISPMODE_ipd  :  std_logic_vector(3 downto 0);
        signal   TXCHARDISPVAL_ipd  :  std_logic_vector(3 downto 0);
        signal   TXCHARISK_ipd  :  std_logic_vector(3 downto 0);
        signal   TXDATA_ipd  :  std_logic_vector(31 downto 0);
        signal   TXFORCECRCERR_ipd  :  std_ulogic;
        signal   TXINHIBIT_ipd  :  std_ulogic;
        signal   TXPOLARITY_ipd  :  std_ulogic;
        signal   TXRESET_ipd  :  std_ulogic;
        signal   TXUSRCLK_ipd  :  std_ulogic;
        signal   TXUSRCLK2_ipd  :  std_ulogic;


begin

BREFCLK_ipd < = BREFCLK after in_delay;
BREFCLK2_ipd < = BREFCLK2 after in_delay;
CHBONDI_ipd < = CHBONDI after in_delay;
CONFIGENABLE_ipd < = CONFIGENABLE after in_delay;
CONFIGIN_ipd < = CONFIGIN after in_delay;
ENCHANSYNC_ipd < = ENCHANSYNC after in_delay;
ENMCOMMAALIGN_ipd < = ENMCOMMAALIGN after in_delay;
ENPCOMMAALIGN_ipd < = ENPCOMMAALIGN after in_delay;
LOOPBACK_ipd < = LOOPBACK after in_delay;
POWERDOWN_ipd < = POWERDOWN after in_delay;
REFCLK_ipd < = REFCLK after in_delay;
REFCLK2_ipd < = REFCLK2 after in_delay;
REFCLKSEL_ipd < = REFCLKSEL after in_delay;
RXN_ipd < = RXN after in_delay;
RXP_ipd < = RXP after in_delay;
RXPOLARITY_ipd < = RXPOLARITY after in_delay;
RXRESET_ipd < = RXRESET after in_delay;
RXUSRCLK_ipd < = RXUSRCLK after in_delay;
RXUSRCLK2_ipd < = RXUSRCLK2 after in_delay;
TXBYPASS8B10B_ipd < = TXBYPASS8B10B after in_delay;
TXCHARDISPMODE_ipd < = TXCHARDISPMODE after in_delay;
TXCHARDISPVAL_ipd < = TXCHARDISPVAL after in_delay;
TXCHARISK_ipd < = TXCHARISK after in_delay;
TXDATA_ipd < = TXDATA after in_delay;
TXFORCECRCERR_ipd < = TXFORCECRCERR after in_delay;
TXINHIBIT_ipd < = TXINHIBIT after in_delay;
TXPOLARITY_ipd < = TXPOLARITY after in_delay;
TXRESET_ipd < = TXRESET after in_delay;
TXUSRCLK_ipd < = TXUSRCLK after in_delay;
TXUSRCLK2_ipd < = TXUSRCLK2 after in_delay;

   gt_swift_bw_1 : GT_SWIFT_BUS
      port map (
          ALIGN_COMMA_MSB  =>  ALIGN_COMMA_MSB_BINARY,
          BREFCLK  =>  BREFCLK_ipd,
          BREFCLK2  =>  BREFCLK2_ipd,
          CHAN_BOND_LIMIT  =>  CHAN_BOND_LIMIT_BINARY,
          CHAN_BOND_MODE  =>  CHAN_BOND_MODE_BINARY,
          CHAN_BOND_OFFSET  =>  CHAN_BOND_OFFSET_BINARY,
          CHAN_BOND_ONE_SHOT  =>  CHAN_BOND_ONE_SHOT_BINARY,
          CHAN_BOND_SEQ_1_1  =>  CHAN_BOND_SEQ_1_1_BINARY,
          CHAN_BOND_SEQ_1_2  =>  CHAN_BOND_SEQ_1_2_BINARY,
          CHAN_BOND_SEQ_1_3  =>  CHAN_BOND_SEQ_1_3_BINARY,
          CHAN_BOND_SEQ_1_4  =>  CHAN_BOND_SEQ_1_4_BINARY,
          CHAN_BOND_SEQ_2_1  =>  CHAN_BOND_SEQ_2_1_BINARY,
          CHAN_BOND_SEQ_2_2  =>  CHAN_BOND_SEQ_2_2_BINARY,
          CHAN_BOND_SEQ_2_3  =>  CHAN_BOND_SEQ_2_3_BINARY,
          CHAN_BOND_SEQ_2_4  =>  CHAN_BOND_SEQ_2_4_BINARY,
          CHAN_BOND_SEQ_2_USE  =>  CHAN_BOND_SEQ_2_USE_BINARY,
          CHAN_BOND_SEQ_LEN  =>  CHAN_BOND_SEQ_LEN_BINARY,
          CHAN_BOND_WAIT  =>  CHAN_BOND_WAIT_BINARY,
          CHBONDDONE  =>  CHBONDDONE_out,
          CHBONDI  =>  CHBONDI_ipd,
          CHBONDO  =>  CHBONDO_out,
          CLK_CORRECT_USE  =>  CLK_CORRECT_USE_BINARY,
          CLK_COR_INSERT_IDLE_FLAG  =>  CLK_COR_INSERT_IDLE_FLAG_BINARY,
          CLK_COR_KEEP_IDLE  =>  CLK_COR_KEEP_IDLE_BINARY,
          CLK_COR_REPEAT_WAIT  =>  CLK_COR_REPEAT_WAIT_BINARY,
          CLK_COR_SEQ_1_1  =>  CLK_COR_SEQ_1_1_BINARY,
          CLK_COR_SEQ_1_2  =>  CLK_COR_SEQ_1_2_BINARY,
          CLK_COR_SEQ_1_3  =>  CLK_COR_SEQ_1_3_BINARY,
          CLK_COR_SEQ_1_4  =>  CLK_COR_SEQ_1_4_BINARY,
          CLK_COR_SEQ_2_1  =>  CLK_COR_SEQ_2_1_BINARY,
          CLK_COR_SEQ_2_2  =>  CLK_COR_SEQ_2_2_BINARY,
          CLK_COR_SEQ_2_3  =>  CLK_COR_SEQ_2_3_BINARY,
          CLK_COR_SEQ_2_4  =>  CLK_COR_SEQ_2_4_BINARY,
          CLK_COR_SEQ_2_USE  =>  CLK_COR_SEQ_2_USE_BINARY,
          CLK_COR_SEQ_LEN  =>  CLK_COR_SEQ_LEN_BINARY,
          COMMA_10B_MASK  =>  COMMA_10B_MASK_BINARY,
          CONFIGENABLE  =>  CONFIGENABLE_ipd,
          CONFIGIN  =>  CONFIGIN_ipd,
          CONFIGOUT  =>  CONFIGOUT_out,
          CRC_END_OF_PKT  =>  CRC_END_OF_PKT_BINARY,
          CRC_FORMAT  =>  CRC_FORMAT_BINARY,
          CRC_START_OF_PKT  =>  CRC_START_OF_PKT_BINARY,
          DEC_MCOMMA_DETECT  =>  DEC_MCOMMA_DETECT_BINARY,
          DEC_PCOMMA_DETECT  =>  DEC_PCOMMA_DETECT_BINARY,
          DEC_VALID_COMMA_ONLY  =>  DEC_VALID_COMMA_ONLY_BINARY,
          ENCHANSYNC  =>  ENCHANSYNC_ipd,
          ENMCOMMAALIGN  =>  ENMCOMMAALIGN_ipd,
          ENPCOMMAALIGN  =>  ENPCOMMAALIGN_ipd,
          GSR  =>  GSR,
          LOOPBACK  =>  LOOPBACK_ipd,
          MCOMMA_10B_VALUE  =>  MCOMMA_10B_VALUE_BINARY,
          MCOMMA_DETECT  =>  MCOMMA_DETECT_BINARY,
          PCOMMA_10B_VALUE  =>  PCOMMA_10B_VALUE_BINARY,
          PCOMMA_DETECT  =>  PCOMMA_DETECT_BINARY,
          POWERDOWN  =>  POWERDOWN_ipd,
          REFCLK  =>  REFCLK_ipd,
          REFCLK2  =>  REFCLK2_ipd,
          REFCLKSEL  =>  REFCLKSEL_ipd,
          REF_CLK_V_SEL  =>  REF_CLK_V_SEL_BINARY,
          RXBUFSTATUS  =>  RXBUFSTATUS_out,
          RXCHARISCOMMA  =>  RXCHARISCOMMA_out,
          RXCHARISK  =>  RXCHARISK_out,
          RXCHECKINGCRC  =>  RXCHECKINGCRC_out,
          RXCLKCORCNT  =>  RXCLKCORCNT_out,
          RXCOMMADET  =>  RXCOMMADET_out,
          RXCRCERR  =>  RXCRCERR_out,
          RXDATA  =>  RXDATA_out,
          RXDISPERR  =>  RXDISPERR_out,
          RXLOSSOFSYNC  =>  RXLOSSOFSYNC_out,
          RXN  =>  RXN_ipd,
          RXNOTINTABLE  =>  RXNOTINTABLE_out,
          RXP  =>  RXP_ipd,
          RXPOLARITY  =>  RXPOLARITY_ipd,
          RXREALIGN  =>  RXREALIGN_out,
          RXRECCLK  =>  RXRECCLK_out,
          RXRESET  =>  RXRESET_ipd,
          RXRUNDISP  =>  RXRUNDISP_out,
          RXUSRCLK  =>  RXUSRCLK_ipd,
          RXUSRCLK2  =>  RXUSRCLK2_ipd,
          RX_BUFFER_USE  =>  RX_BUFFER_USE_BINARY,
          RX_CRC_USE  =>  RX_CRC_USE_BINARY,
          RX_DATA_WIDTH  =>  RX_DATA_WIDTH_BINARY,
          RX_DECODE_USE  =>  RX_DECODE_USE_BINARY,
          RX_LOSS_OF_SYNC_FSM  =>  RX_LOSS_OF_SYNC_FSM_BINARY,
          RX_LOS_INVALID_INCR  =>  RX_LOS_INVALID_INCR_BINARY,
          RX_LOS_THRESHOLD  =>  RX_LOS_THRESHOLD_BINARY,
          SERDES_10B  =>  SERDES_10B_BINARY,
          TERMINATION_IMP  =>  TERMINATION_IMP_BINARY,
          TXBUFERR  =>  TXBUFERR_out,
          TXBYPASS8B10B  =>  TXBYPASS8B10B_ipd,
          TXCHARDISPMODE  =>  TXCHARDISPMODE_ipd,
          TXCHARDISPVAL  =>  TXCHARDISPVAL_ipd,
          TXCHARISK  =>  TXCHARISK_ipd,
          TXDATA  =>  TXDATA_ipd,
          TXFORCECRCERR  =>  TXFORCECRCERR_ipd,
          TXINHIBIT  =>  TXINHIBIT_ipd,
          TXKERR  =>  TXKERR_out,
          TXN  =>  TXN_out,
          TXP  =>  TXP_out,
          TXPOLARITY  =>  TXPOLARITY_ipd,
          TXRESET  =>  TXRESET_ipd,
          TXRUNDISP  =>  TXRUNDISP_out,
          TXUSRCLK  =>  TXUSRCLK_ipd,
          TXUSRCLK2  =>  TXUSRCLK2_ipd,
          TX_BUFFER_USE  =>  TX_BUFFER_USE_BINARY,
          TX_CRC_FORCE_VALUE  =>  TX_CRC_FORCE_VALUE_BINARY,
          TX_CRC_USE  =>  TX_CRC_USE_BINARY,
          TX_DATA_WIDTH  =>  TX_DATA_WIDTH_BINARY,
          TX_DIFF_CTRL  =>  TX_DIFF_CTRL_BINARY,
          TX_PREEMPHASIS  =>  TX_PREEMPHASIS_BINARY

      );

   INIPROC : process
     begin
       case ALIGN_COMMA_MSB is
           when FALSE   =>  ALIGN_COMMA_MSB_BINARY < = '0';
           when TRUE    =>  ALIGN_COMMA_MSB_BINARY < = '1';
           when others  =>  assert FALSE report "Error : ALIGN_COMMA_MSB is neither TRUE nor FALSE." severity warning;
       end case;
       case CHAN_BOND_LIMIT is
           when   1  =>  CHAN_BOND_LIMIT_BINARY < = "00001";
           when   2  =>  CHAN_BOND_LIMIT_BINARY < = "00010";
           when   3  =>  CHAN_BOND_LIMIT_BINARY < = "00011";
           when   4  =>  CHAN_BOND_LIMIT_BINARY < = "00100";
           when   5  =>  CHAN_BOND_LIMIT_BINARY < = "00101";
           when   6  =>  CHAN_BOND_LIMIT_BINARY < = "00110";
           when   7  =>  CHAN_BOND_LIMIT_BINARY < = "00111";
           when   8  =>  CHAN_BOND_LIMIT_BINARY < = "01000";
           when   9  =>  CHAN_BOND_LIMIT_BINARY < = "01001";
           when   10  =>  CHAN_BOND_LIMIT_BINARY < = "01010";
           when   11  =>  CHAN_BOND_LIMIT_BINARY < = "01011";
           when   12  =>  CHAN_BOND_LIMIT_BINARY < = "01100";
           when   13  =>  CHAN_BOND_LIMIT_BINARY < = "01101";
           when   14  =>  CHAN_BOND_LIMIT_BINARY < = "01110";
           when   15  =>  CHAN_BOND_LIMIT_BINARY < = "01111";
           when   16  =>  CHAN_BOND_LIMIT_BINARY < = "10000";
           when   17  =>  CHAN_BOND_LIMIT_BINARY < = "10001";
           when   18  =>  CHAN_BOND_LIMIT_BINARY < = "10010";
           when   19  =>  CHAN_BOND_LIMIT_BINARY < = "10011";
           when   20  =>  CHAN_BOND_LIMIT_BINARY < = "10100";
           when   21  =>  CHAN_BOND_LIMIT_BINARY < = "10101";
           when   22  =>  CHAN_BOND_LIMIT_BINARY < = "10110";
           when   23  =>  CHAN_BOND_LIMIT_BINARY < = "10111";
           when   24  =>  CHAN_BOND_LIMIT_BINARY < = "11000";
           when   25  =>  CHAN_BOND_LIMIT_BINARY < = "11001";
           when   26  =>  CHAN_BOND_LIMIT_BINARY < = "11010";
           when   27  =>  CHAN_BOND_LIMIT_BINARY < = "11011";
           when   28  =>  CHAN_BOND_LIMIT_BINARY < = "11100";
           when   29  =>  CHAN_BOND_LIMIT_BINARY < = "11101";
           when   30  =>  CHAN_BOND_LIMIT_BINARY < = "11110";
           when   31  =>  CHAN_BOND_LIMIT_BINARY < = "11111";
           when others  =>  assert FALSE report "Error : CHAN_BOND_LIMIT is not in range 1...31." severity warning;
       end case;
--     case CHAN_BOND_MODE is
           if((CHAN_BOND_MODE = "OFF") or (CHAN_BOND_MODE = "off")) then
               CHAN_BOND_MODE_BINARY < = "00";
           elsif((CHAN_BOND_MODE = "MASTER") or (CHAN_BOND_MODE = "master")) then
               CHAN_BOND_MODE_BINARY < = "01";
           elsif((CHAN_BOND_MODE = "SLAVE_1_HOP") or (CHAN_BOND_MODE = "slave_1_hop")) then
               CHAN_BOND_MODE_BINARY < = "10";
           elsif((CHAN_BOND_MODE = "SLAVE_2_HOPS") or (CHAN_BOND_MODE = "slave_2_hops")) then
               CHAN_BOND_MODE_BINARY < = "11";
           else
             assert FALSE report "Error : CHAN_BOND_MODE = is not OFF, MASTER, SLAVE_1_HOP, SLAVE_2_HOPS." severity warning;
           end if;
--     end case;
       case CHAN_BOND_OFFSET is
           when   0  =>  CHAN_BOND_OFFSET_BINARY < = "0000";
           when   1  =>  CHAN_BOND_OFFSET_BINARY < = "0001";
           when   2  =>  CHAN_BOND_OFFSET_BINARY < = "0010";
           when   3  =>  CHAN_BOND_OFFSET_BINARY < = "0011";
           when   4  =>  CHAN_BOND_OFFSET_BINARY < = "0100";
           when   5  =>  CHAN_BOND_OFFSET_BINARY < = "0101";
           when   6  =>  CHAN_BOND_OFFSET_BINARY < = "0110";
           when   7  =>  CHAN_BOND_OFFSET_BINARY < = "0111";
           when   8  =>  CHAN_BOND_OFFSET_BINARY < = "1000";
           when   9  =>  CHAN_BOND_OFFSET_BINARY < = "1001";
           when   10  =>  CHAN_BOND_OFFSET_BINARY < = "1010";
           when   11  =>  CHAN_BOND_OFFSET_BINARY < = "1011";
           when   12  =>  CHAN_BOND_OFFSET_BINARY < = "1100";
           when   13  =>  CHAN_BOND_OFFSET_BINARY < = "1101";
           when   14  =>  CHAN_BOND_OFFSET_BINARY < = "1110";
           when   15  =>  CHAN_BOND_OFFSET_BINARY < = "1111";
           when others  =>  assert FALSE report "Error : CHAN_BOND_OFFSET is not in range 0...15." severity warning;
       end case;
       case CHAN_BOND_ONE_SHOT is
           when FALSE   =>  CHAN_BOND_ONE_SHOT_BINARY < = '0';
           when TRUE    =>  CHAN_BOND_ONE_SHOT_BINARY < = '1';
           when others  =>  assert FALSE report "Error : CHAN_BOND_ONE_SHOT is neither TRUE nor FALSE." severity warning;
       end case;
       case CHAN_BOND_SEQ_2_USE is
           when FALSE   =>  CHAN_BOND_SEQ_2_USE_BINARY < = '0';
           when TRUE    =>  CHAN_BOND_SEQ_2_USE_BINARY < = '1';
           when others  =>  assert FALSE report "Error : CHAN_BOND_SEQ_2_USE is neither TRUE nor FALSE." severity warning;
       end case;
       case CHAN_BOND_SEQ_LEN is
           when   1  =>  CHAN_BOND_SEQ_LEN_BINARY < = "01";
           when   2  =>  CHAN_BOND_SEQ_LEN_BINARY < = "10";
           when   3  =>  CHAN_BOND_SEQ_LEN_BINARY < = "11";
           when   4  =>  CHAN_BOND_SEQ_LEN_BINARY < = "00";
           when others  =>  assert FALSE report "Error : CHAN_BOND_SEQ_LEN is not in range 1...4." severity warning;
       end case;
       case CHAN_BOND_WAIT is
           when   1  =>  CHAN_BOND_WAIT_BINARY < = "0001";
           when   2  =>  CHAN_BOND_WAIT_BINARY < = "0010";
           when   3  =>  CHAN_BOND_WAIT_BINARY < = "0011";
           when   4  =>  CHAN_BOND_WAIT_BINARY < = "0100";
           when   5  =>  CHAN_BOND_WAIT_BINARY < = "0101";
           when   6  =>  CHAN_BOND_WAIT_BINARY < = "0110";
           when   7  =>  CHAN_BOND_WAIT_BINARY < = "0111";
           when   8  =>  CHAN_BOND_WAIT_BINARY < = "1000";
           when   9  =>  CHAN_BOND_WAIT_BINARY < = "1001";
           when   10  =>  CHAN_BOND_WAIT_BINARY < = "1010";
           when   11  =>  CHAN_BOND_WAIT_BINARY < = "1011";
           when   12  =>  CHAN_BOND_WAIT_BINARY < = "1100";
           when   13  =>  CHAN_BOND_WAIT_BINARY < = "1101";
           when   14  =>  CHAN_BOND_WAIT_BINARY < = "1110";
           when   15  =>  CHAN_BOND_WAIT_BINARY < = "1111";
           when others  =>  assert FALSE report "Error : CHAN_BOND_WAIT is not in range 1...15." severity warning;
       end case;
       case CLK_COR_INSERT_IDLE_FLAG is
           when FALSE   =>  CLK_COR_INSERT_IDLE_FLAG_BINARY < = '0';
           when TRUE    =>  CLK_COR_INSERT_IDLE_FLAG_BINARY < = '1';
           when others  =>  assert FALSE report "Error : CLK_COR_INSERT_IDLE_FLAG is neither TRUE nor FALSE." severity warning;
       end case;
       case CLK_COR_KEEP_IDLE is
           when FALSE   =>  CLK_COR_KEEP_IDLE_BINARY < = '0';
           when TRUE    =>  CLK_COR_KEEP_IDLE_BINARY < = '1';
           when others  =>  assert FALSE report "Error : CLK_COR_KEEP_IDLE is neither TRUE nor FALSE." severity warning;
       end case;
       case CLK_COR_REPEAT_WAIT is
           when   0  =>  CLK_COR_REPEAT_WAIT_BINARY < = "00000";
           when   1  =>  CLK_COR_REPEAT_WAIT_BINARY < = "00001";
           when   2  =>  CLK_COR_REPEAT_WAIT_BINARY < = "00010";
           when   3  =>  CLK_COR_REPEAT_WAIT_BINARY < = "00011";
           when   4  =>  CLK_COR_REPEAT_WAIT_BINARY < = "00100";
           when   5  =>  CLK_COR_REPEAT_WAIT_BINARY < = "00101";
           when   6  =>  CLK_COR_REPEAT_WAIT_BINARY < = "00110";
           when   7  =>  CLK_COR_REPEAT_WAIT_BINARY < = "00111";
           when   8  =>  CLK_COR_REPEAT_WAIT_BINARY < = "01000";
           when   9  =>  CLK_COR_REPEAT_WAIT_BINARY < = "01001";
           when   10  =>  CLK_COR_REPEAT_WAIT_BINARY < = "01010";
           when   11  =>  CLK_COR_REPEAT_WAIT_BINARY < = "01011";
           when   12  =>  CLK_COR_REPEAT_WAIT_BINARY < = "01100";
           when   13  =>  CLK_COR_REPEAT_WAIT_BINARY < = "01101";
           when   14  =>  CLK_COR_REPEAT_WAIT_BINARY < = "01110";
           when   15  =>  CLK_COR_REPEAT_WAIT_BINARY < = "01111";
           when   16  =>  CLK_COR_REPEAT_WAIT_BINARY < = "10000";
           when   17  =>  CLK_COR_REPEAT_WAIT_BINARY < = "10001";
           when   18  =>  CLK_COR_REPEAT_WAIT_BINARY < = "10010";
           when   19  =>  CLK_COR_REPEAT_WAIT_BINARY < = "10011";
           when   20  =>  CLK_COR_REPEAT_WAIT_BINARY < = "10100";
           when   21  =>  CLK_COR_REPEAT_WAIT_BINARY < = "10101";
           when   22  =>  CLK_COR_REPEAT_WAIT_BINARY < = "10110";
           when   23  =>  CLK_COR_REPEAT_WAIT_BINARY < = "10111";
           when   24  =>  CLK_COR_REPEAT_WAIT_BINARY < = "11000";
           when   25  =>  CLK_COR_REPEAT_WAIT_BINARY < = "11001";
           when   26  =>  CLK_COR_REPEAT_WAIT_BINARY < = "11010";
           when   27  =>  CLK_COR_REPEAT_WAIT_BINARY < = "11011";
           when   28  =>  CLK_COR_REPEAT_WAIT_BINARY < = "11100";
           when   29  =>  CLK_COR_REPEAT_WAIT_BINARY < = "11101";
           when   30  =>  CLK_COR_REPEAT_WAIT_BINARY < = "11110";
           when   31  =>  CLK_COR_REPEAT_WAIT_BINARY < = "11111";
           when others  =>  assert FALSE report "Error : CLK_COR_REPEAT_WAIT is not in range 0...31." severity warning;
       end case;
       case CLK_COR_SEQ_2_USE is
           when FALSE   =>  CLK_COR_SEQ_2_USE_BINARY < = '0';
           when TRUE    =>  CLK_COR_SEQ_2_USE_BINARY < = '1';
           when others  =>  assert FALSE report "Error : CLK_COR_SEQ_2_USE is neither TRUE nor FALSE." severity warning;
       end case;
       case CLK_COR_SEQ_LEN is
           when   1  =>  CLK_COR_SEQ_LEN_BINARY < = "01";
           when   2  =>  CLK_COR_SEQ_LEN_BINARY < = "10";
           when   3  =>  CLK_COR_SEQ_LEN_BINARY < = "11";
           when   4  =>  CLK_COR_SEQ_LEN_BINARY < = "00";
           when others  =>  assert FALSE report "Error : CLK_COR_SEQ_LEN is not in range 1...4." severity warning;
       end case;
       case CLK_CORRECT_USE is
           when FALSE   =>  CLK_CORRECT_USE_BINARY < = '0';
           when TRUE    =>  CLK_CORRECT_USE_BINARY < = '1';
           when others  =>  assert FALSE report "Error : CLK_CORRECT_USE is neither TRUE nor FALSE." severity warning;
       end case;
--     case CRC_END_OF_PKT is
           if((CRC_END_OF_PKT = "K28_0") or (CRC_END_OF_PKT = "k28_0")) then
               CRC_END_OF_PKT_BINARY < = "00011100";
           elsif((CRC_END_OF_PKT = "K28_1") or (CRC_END_OF_PKT = "k28_1")) then
               CRC_END_OF_PKT_BINARY < = "00111100";
           elsif((CRC_END_OF_PKT = "K28_2") or (CRC_END_OF_PKT = "k28_2")) then
               CRC_END_OF_PKT_BINARY < = "01011100";
           elsif((CRC_END_OF_PKT = "K28_3") or (CRC_END_OF_PKT = "k28_3")) then
               CRC_END_OF_PKT_BINARY < = "01111100";
           elsif((CRC_END_OF_PKT = "K28_4") or (CRC_END_OF_PKT = "k28_4")) then
               CRC_END_OF_PKT_BINARY < = "10011100";
           elsif((CRC_END_OF_PKT = "K28_5") or (CRC_END_OF_PKT = "k28_5")) then
               CRC_END_OF_PKT_BINARY < = "10111100";
           elsif((CRC_END_OF_PKT = "K28_6") or (CRC_END_OF_PKT = "k28_6")) then
               CRC_END_OF_PKT_BINARY < = "11011100";
           elsif((CRC_END_OF_PKT = "K28_7") or (CRC_END_OF_PKT = "k28_7")) then
               CRC_END_OF_PKT_BINARY < = "11111100";
           elsif((CRC_END_OF_PKT = "K23_7") or (CRC_END_OF_PKT = "k23_7")) then
               CRC_END_OF_PKT_BINARY < = "11110111";
           elsif((CRC_END_OF_PKT = "K27_7") or (CRC_END_OF_PKT = "k27_7")) then
               CRC_END_OF_PKT_BINARY < = "11111011";
           elsif((CRC_END_OF_PKT = "K29_7") or (CRC_END_OF_PKT = "k29_7")) then
               CRC_END_OF_PKT_BINARY < = "11111101";
           elsif((CRC_END_OF_PKT = "K30_7") or (CRC_END_OF_PKT = "k30_7")) then
               CRC_END_OF_PKT_BINARY < = "11111110";
           else
             assert FALSE report "Error : CRC_END_OF_PKT = is not K28_0, K28_1, K28_2, K28_3, K28_4, K28_5, K28_6, K28_7, K23_7, K27_7, K29_7, K30_7." severity warning;
           end if;
--     end case;
--     case CRC_FORMAT is
           if((CRC_FORMAT = "USER_MODE") or (CRC_FORMAT = "user_mode")) then
               CRC_FORMAT_BINARY < = "00";
           elsif((CRC_FORMAT = "ETHERNET") or (CRC_FORMAT = "ethernet")) then
               CRC_FORMAT_BINARY < = "01";
           elsif((CRC_FORMAT = "INFINIBAND") or (CRC_FORMAT = "infiniband")) then
               CRC_FORMAT_BINARY < = "10";
           elsif((CRC_FORMAT = "FIBRE_CHAN") or (CRC_FORMAT = "fibre_chan")) then
               CRC_FORMAT_BINARY < = "11";
           else
             assert FALSE report "Error : CRC_FORMAT = is not USER_MODE, ETHERNET, INFINIBAND, FIBRE_CHAN." severity warning;
           end if;
--     end case;
--     case CRC_START_OF_PKT is
           if((CRC_START_OF_PKT = "K28_0") or (CRC_START_OF_PKT = "k28_0")) then
               CRC_START_OF_PKT_BINARY < = "00011100";
           elsif((CRC_START_OF_PKT = "K28_1") or (CRC_START_OF_PKT = "k28_1")) then
               CRC_START_OF_PKT_BINARY < = "00111100";
           elsif((CRC_START_OF_PKT = "K28_2") or (CRC_START_OF_PKT = "k28_2")) then
               CRC_START_OF_PKT_BINARY < = "01011100";
           elsif((CRC_START_OF_PKT = "K28_3") or (CRC_START_OF_PKT = "k28_3")) then
               CRC_START_OF_PKT_BINARY < = "01111100";
           elsif((CRC_START_OF_PKT = "K28_4") or (CRC_START_OF_PKT = "k28_4")) then
               CRC_START_OF_PKT_BINARY < = "10011100";
           elsif((CRC_START_OF_PKT = "K28_5") or (CRC_START_OF_PKT = "k28_5")) then
               CRC_START_OF_PKT_BINARY < = "10111100";
           elsif((CRC_START_OF_PKT = "K28_6") or (CRC_START_OF_PKT = "k28_6")) then
               CRC_START_OF_PKT_BINARY < = "11011100";
           elsif((CRC_START_OF_PKT = "K28_7") or (CRC_START_OF_PKT = "k28_7")) then
               CRC_START_OF_PKT_BINARY < = "11111100";
           elsif((CRC_START_OF_PKT = "K23_7") or (CRC_START_OF_PKT = "k23_7")) then
               CRC_START_OF_PKT_BINARY < = "11110111";
           elsif((CRC_START_OF_PKT = "K27_7") or (CRC_START_OF_PKT = "k27_7")) then
               CRC_START_OF_PKT_BINARY < = "11111011";
           elsif((CRC_START_OF_PKT = "K29_7") or (CRC_START_OF_PKT = "k29_7")) then
               CRC_START_OF_PKT_BINARY < = "11111101";
           elsif((CRC_START_OF_PKT = "K30_7") or (CRC_START_OF_PKT = "k30_7")) then
               CRC_START_OF_PKT_BINARY < = "11111110";
           else
             assert FALSE report "Error : CRC_START_OF_PKT = is not K28_0, K28_1, K28_2, K28_3, K28_4, K28_5, K28_6, K28_7, K23_7, K27_7, K29_7, K30_7." severity warning;
           end if;
--     end case;
       case DEC_MCOMMA_DETECT is
           when FALSE   =>  DEC_MCOMMA_DETECT_BINARY < = '0';
           when TRUE    =>  DEC_MCOMMA_DETECT_BINARY < = '1';
           when others  =>  assert FALSE report "Error : DEC_MCOMMA_DETECT is neither TRUE nor FALSE." severity warning;
       end case;
       case DEC_PCOMMA_DETECT is
           when FALSE   =>  DEC_PCOMMA_DETECT_BINARY < = '0';
           when TRUE    =>  DEC_PCOMMA_DETECT_BINARY < = '1';
           when others  =>  assert FALSE report "Error : DEC_PCOMMA_DETECT is neither TRUE nor FALSE." severity warning;
       end case;
       case DEC_VALID_COMMA_ONLY is
           when FALSE   =>  DEC_VALID_COMMA_ONLY_BINARY < = '0';
           when TRUE    =>  DEC_VALID_COMMA_ONLY_BINARY < = '1';
           when others  =>  assert FALSE report "Error : DEC_VALID_COMMA_ONLY is neither TRUE nor FALSE." severity warning;
       end case;
       case MCOMMA_DETECT is
           when FALSE   =>  MCOMMA_DETECT_BINARY < = '0';
           when TRUE    =>  MCOMMA_DETECT_BINARY < = '1';
           when others  =>  assert FALSE report "Error : MCOMMA_DETECT is neither TRUE nor FALSE." severity warning;
       end case;
       case PCOMMA_DETECT is
           when FALSE   =>  PCOMMA_DETECT_BINARY < = '0';
           when TRUE    =>  PCOMMA_DETECT_BINARY < = '1';
           when others  =>  assert FALSE report "Error : PCOMMA_DETECT is neither TRUE nor FALSE." severity warning;
       end case;
       case REF_CLK_V_SEL is
           when   0  =>  REF_CLK_V_SEL_BINARY < = '0';
           when   1  =>  REF_CLK_V_SEL_BINARY < = '1';
           when others  =>  assert FALSE report "Error : REF_CLK_V_SEL is not in 0, 1." severity warning;
       end case;
       case RX_BUFFER_USE is
           when FALSE   =>  RX_BUFFER_USE_BINARY < = '0';
           when TRUE    =>  RX_BUFFER_USE_BINARY < = '1';
           when others  =>  assert FALSE report "Error : RX_BUFFER_USE is neither TRUE nor FALSE." severity warning;
       end case;
       case RX_CRC_USE is
           when FALSE   =>  RX_CRC_USE_BINARY < = '0';
           when TRUE    =>  RX_CRC_USE_BINARY < = '1';
           when others  =>  assert FALSE report "Error : RX_CRC_USE is neither TRUE nor FALSE." severity warning;
       end case;
       case RX_DATA_WIDTH is
           when   1  =>  RX_DATA_WIDTH_BINARY < = "01";
           when   2  =>  RX_DATA_WIDTH_BINARY < = "10";
           when   4  =>  RX_DATA_WIDTH_BINARY < = "00";
           when others  =>  assert FALSE report "Error : RX_DATA_WIDTH is not in 1, 2, 4." severity warning;
       end case;
       case RX_DECODE_USE is
           when FALSE   =>  RX_DECODE_USE_BINARY < = '0';
           when TRUE    =>  RX_DECODE_USE_BINARY < = '1';
           when others  =>  assert FALSE report "Error : RX_DECODE_USE is neither TRUE nor FALSE." severity warning;
       end case;
       case RX_LOS_INVALID_INCR is
           when   1  =>  RX_LOS_INVALID_INCR_BINARY < = "000";
           when   2  =>  RX_LOS_INVALID_INCR_BINARY < = "001";
           when   4  =>  RX_LOS_INVALID_INCR_BINARY < = "010";
           when   8  =>  RX_LOS_INVALID_INCR_BINARY < = "011";
           when   16  =>  RX_LOS_INVALID_INCR_BINARY < = "100";
           when   32  =>  RX_LOS_INVALID_INCR_BINARY < = "101";
           when   64  =>  RX_LOS_INVALID_INCR_BINARY < = "110";
           when   128  =>  RX_LOS_INVALID_INCR_BINARY < = "111";
           when others  =>  assert FALSE report "Error : RX_LOS_INVALID_INCR is not in 1, 2, 4, 8, 16, 32, 64, 128." severity warning;
       end case;
       case RX_LOS_THRESHOLD is
           when   4  =>  RX_LOS_THRESHOLD_BINARY < = "000";
           when   8  =>  RX_LOS_THRESHOLD_BINARY < = "001";
           when   16  =>  RX_LOS_THRESHOLD_BINARY < = "010";
           when   32  =>  RX_LOS_THRESHOLD_BINARY < = "011";
           when   64  =>  RX_LOS_THRESHOLD_BINARY < = "100";
           when   128  =>  RX_LOS_THRESHOLD_BINARY < = "101";
           when   256  =>  RX_LOS_THRESHOLD_BINARY < = "110";
           when   512  =>  RX_LOS_THRESHOLD_BINARY < = "111";
           when others  =>  assert FALSE report "Error : RX_LOS_THRESHOLD is not in 4, 8, 16, 32, 64, 128, 256, 512." severity warning;
       end case;
       case RX_LOSS_OF_SYNC_FSM is
           when FALSE   =>  RX_LOSS_OF_SYNC_FSM_BINARY < = '0';
           when TRUE    =>  RX_LOSS_OF_SYNC_FSM_BINARY < = '1';
           when others  =>  assert FALSE report "Error : RX_LOSS_OF_SYNC_FSM is neither TRUE nor FALSE." severity warning;
       end case;
       case SERDES_10B is
           when FALSE   =>  SERDES_10B_BINARY < = '0';
           when TRUE    =>  SERDES_10B_BINARY < = '1';
           when others  =>  assert FALSE report "Error : SERDES_10B is neither TRUE nor FALSE." severity warning;
       end case;
       case TERMINATION_IMP is
           when   50  =>  TERMINATION_IMP_BINARY < = '0';
           when   75  =>  TERMINATION_IMP_BINARY < = '1';
           when others  =>  assert FALSE report "Error : TERMINATION_IMP is not in 50, 75." severity warning;
       end case;
       case TX_BUFFER_USE is
           when FALSE   =>  TX_BUFFER_USE_BINARY < = '0';
           when TRUE    =>  TX_BUFFER_USE_BINARY < = '1';
           when others  =>  assert FALSE report "Error : TX_BUFFER_USE is neither TRUE nor FALSE." severity warning;
       end case;
       case TX_CRC_USE is
           when FALSE   =>  TX_CRC_USE_BINARY < = '0';
           when TRUE    =>  TX_CRC_USE_BINARY < = '1';
           when others  =>  assert FALSE report "Error : TX_CRC_USE is neither TRUE nor FALSE." severity warning;
       end case;
       case TX_DATA_WIDTH is
           when   1  =>  TX_DATA_WIDTH_BINARY < = "01";
           when   2  =>  TX_DATA_WIDTH_BINARY < = "10";
           when   4  =>  TX_DATA_WIDTH_BINARY < = "00";
           when others  =>  assert FALSE report "Error : TX_DATA_WIDTH is not in 1, 2, 4." severity warning;
       end case;
       case TX_DIFF_CTRL is
           when   400  =>  TX_DIFF_CTRL_BINARY < = "010";
           when   500  =>  TX_DIFF_CTRL_BINARY < = "000";
           when   600  =>  TX_DIFF_CTRL_BINARY < = "001";
           when   700  =>  TX_DIFF_CTRL_BINARY < = "011";
           when   800  =>  TX_DIFF_CTRL_BINARY < = "110";
           when others  =>  assert FALSE report "Error : TX_DIFF_CTRL is not in 400, 500, 600, 700, 800." severity warning;
       end case;
       case TX_PREEMPHASIS is
           when   0  =>  TX_PREEMPHASIS_BINARY < = "00";
           when   1  =>  TX_PREEMPHASIS_BINARY < = "01";
           when   2  =>  TX_PREEMPHASIS_BINARY < = "10";
           when   3  =>  TX_PREEMPHASIS_BINARY < = "11";
           when others  =>  assert FALSE report "Error : TX_PREEMPHASIS is not in 0, 1, 2, 3." severity warning;
       end case;
     wait;
   end process INIPROC;

   TIMING : process

--  Pin timing violations (clock input pins)

--  Pin Timing Violations (all input pins)

--  Output Pin glitch declaration
     variable  CHBONDDONE_GlitchData : VitalGlitchDataType;
     variable  CHBONDO0_GlitchData : VitalGlitchDataType;
     variable  CHBONDO1_GlitchData : VitalGlitchDataType;
     variable  CHBONDO2_GlitchData : VitalGlitchDataType;
     variable  CHBONDO3_GlitchData : VitalGlitchDataType;
     variable  CONFIGOUT_GlitchData : VitalGlitchDataType;
     variable  RXBUFSTATUS0_GlitchData : VitalGlitchDataType;
     variable  RXBUFSTATUS1_GlitchData : VitalGlitchDataType;
     variable  RXCHARISCOMMA0_GlitchData : VitalGlitchDataType;
     variable  RXCHARISCOMMA1_GlitchData : VitalGlitchDataType;
     variable  RXCHARISCOMMA2_GlitchData : VitalGlitchDataType;
     variable  RXCHARISCOMMA3_GlitchData : VitalGlitchDataType;
     variable  RXCHARISK0_GlitchData : VitalGlitchDataType;
     variable  RXCHARISK1_GlitchData : VitalGlitchDataType;
     variable  RXCHARISK2_GlitchData : VitalGlitchDataType;
     variable  RXCHARISK3_GlitchData : VitalGlitchDataType;
     variable  RXCHECKINGCRC_GlitchData : VitalGlitchDataType;
     variable  RXCLKCORCNT0_GlitchData : VitalGlitchDataType;
     variable  RXCLKCORCNT1_GlitchData : VitalGlitchDataType;
     variable  RXCLKCORCNT2_GlitchData : VitalGlitchDataType;
     variable  RXCOMMADET_GlitchData : VitalGlitchDataType;
     variable  RXCRCERR_GlitchData : VitalGlitchDataType;
     variable  RXDATA0_GlitchData : VitalGlitchDataType;
     variable  RXDATA1_GlitchData : VitalGlitchDataType;
     variable  RXDATA2_GlitchData : VitalGlitchDataType;
     variable  RXDATA3_GlitchData : VitalGlitchDataType;
     variable  RXDATA4_GlitchData : VitalGlitchDataType;
     variable  RXDATA5_GlitchData : VitalGlitchDataType;
     variable  RXDATA6_GlitchData : VitalGlitchDataType;
     variable  RXDATA7_GlitchData : VitalGlitchDataType;
     variable  RXDATA8_GlitchData : VitalGlitchDataType;
     variable  RXDATA9_GlitchData : VitalGlitchDataType;
     variable  RXDATA10_GlitchData : VitalGlitchDataType;
     variable  RXDATA11_GlitchData : VitalGlitchDataType;
     variable  RXDATA12_GlitchData : VitalGlitchDataType;
     variable  RXDATA13_GlitchData : VitalGlitchDataType;
     variable  RXDATA14_GlitchData : VitalGlitchDataType;
     variable  RXDATA15_GlitchData : VitalGlitchDataType;
     variable  RXDATA16_GlitchData : VitalGlitchDataType;
     variable  RXDATA17_GlitchData : VitalGlitchDataType;
     variable  RXDATA18_GlitchData : VitalGlitchDataType;
     variable  RXDATA19_GlitchData : VitalGlitchDataType;
     variable  RXDATA20_GlitchData : VitalGlitchDataType;
     variable  RXDATA21_GlitchData : VitalGlitchDataType;
     variable  RXDATA22_GlitchData : VitalGlitchDataType;
     variable  RXDATA23_GlitchData : VitalGlitchDataType;
     variable  RXDATA24_GlitchData : VitalGlitchDataType;
     variable  RXDATA25_GlitchData : VitalGlitchDataType;
     variable  RXDATA26_GlitchData : VitalGlitchDataType;
     variable  RXDATA27_GlitchData : VitalGlitchDataType;
     variable  RXDATA28_GlitchData : VitalGlitchDataType;
     variable  RXDATA29_GlitchData : VitalGlitchDataType;
     variable  RXDATA30_GlitchData : VitalGlitchDataType;
     variable  RXDATA31_GlitchData : VitalGlitchDataType;
     variable  RXDISPERR0_GlitchData : VitalGlitchDataType;
     variable  RXDISPERR1_GlitchData : VitalGlitchDataType;
     variable  RXDISPERR2_GlitchData : VitalGlitchDataType;
     variable  RXDISPERR3_GlitchData : VitalGlitchDataType;
     variable  RXLOSSOFSYNC0_GlitchData : VitalGlitchDataType;
     variable  RXLOSSOFSYNC1_GlitchData : VitalGlitchDataType;
     variable  RXNOTINTABLE0_GlitchData : VitalGlitchDataType;
     variable  RXNOTINTABLE1_GlitchData : VitalGlitchDataType;
     variable  RXNOTINTABLE2_GlitchData : VitalGlitchDataType;
     variable  RXNOTINTABLE3_GlitchData : VitalGlitchDataType;
     variable  RXREALIGN_GlitchData : VitalGlitchDataType;
--     variable  RXRECCLK_GlitchData : VitalGlitchDataType;
     variable  RXRUNDISP0_GlitchData : VitalGlitchDataType;
     variable  RXRUNDISP1_GlitchData : VitalGlitchDataType;
     variable  RXRUNDISP2_GlitchData : VitalGlitchDataType;
     variable  RXRUNDISP3_GlitchData : VitalGlitchDataType;
     variable  TXBUFERR_GlitchData : VitalGlitchDataType;
     variable  TXKERR0_GlitchData : VitalGlitchDataType;
     variable  TXKERR1_GlitchData : VitalGlitchDataType;
     variable  TXKERR2_GlitchData : VitalGlitchDataType;
     variable  TXKERR3_GlitchData : VitalGlitchDataType;
--     variable  TXN_GlitchData : VitalGlitchDataType;
--     variable  TXP_GlitchData : VitalGlitchDataType;
     variable  TXRUNDISP0_GlitchData : VitalGlitchDataType;
     variable  TXRUNDISP1_GlitchData : VitalGlitchDataType;
     variable  TXRUNDISP2_GlitchData : VitalGlitchDataType;
     variable  TXRUNDISP3_GlitchData : VitalGlitchDataType;
begin

--  Setup/Hold Check Violations (all input pins)


-- End of (TimingChecksOn)

--  Output-to-Clock path delay
     VitalPathDelay01
       (
         OutSignal     => CHBONDDONE,
         GlitchData    => CHBONDDONE_GlitchData,
         OutSignalName => "CHBONDDONE",
         OutTemp       => CHBONDDONE_OUT,
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => CHBONDO(0),
         GlitchData    => CHBONDO0_GlitchData,
         OutSignalName => "CHBONDO(0)",
         OutTemp       => CHBONDO_OUT(0),
         Paths         => (0 => (RXUSRCLK_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => CHBONDO(1),
         GlitchData    => CHBONDO1_GlitchData,
         OutSignalName => "CHBONDO(1)",
         OutTemp       => CHBONDO_OUT(1),
         Paths         => (0 => (RXUSRCLK_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => CHBONDO(2),
         GlitchData    => CHBONDO2_GlitchData,
         OutSignalName => "CHBONDO(2)",
         OutTemp       => CHBONDO_OUT(2),
         Paths         => (0 => (RXUSRCLK_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => CHBONDO(3),
         GlitchData    => CHBONDO3_GlitchData,
         OutSignalName => "CHBONDO(3)",
         OutTemp       => CHBONDO_OUT(3),
         Paths         => (0 => (RXUSRCLK_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => CONFIGOUT,
         GlitchData    => CONFIGOUT_GlitchData,
         OutSignalName => "CONFIGOUT",
         OutTemp       => CONFIGOUT_OUT,
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXBUFSTATUS(0),
         GlitchData    => RXBUFSTATUS0_GlitchData,
         OutSignalName => "RXBUFSTATUS(0)",
         OutTemp       => RXBUFSTATUS_OUT(0),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXBUFSTATUS(1),
         GlitchData    => RXBUFSTATUS1_GlitchData,
         OutSignalName => "RXBUFSTATUS(1)",
         OutTemp       => RXBUFSTATUS_OUT(1),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCHARISCOMMA(0),
         GlitchData    => RXCHARISCOMMA0_GlitchData,
         OutSignalName => "RXCHARISCOMMA(0)",
         OutTemp       => RXCHARISCOMMA_OUT(0),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCHARISCOMMA(1),
         GlitchData    => RXCHARISCOMMA1_GlitchData,
         OutSignalName => "RXCHARISCOMMA(1)",
         OutTemp       => RXCHARISCOMMA_OUT(1),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCHARISCOMMA(2),
         GlitchData    => RXCHARISCOMMA2_GlitchData,
         OutSignalName => "RXCHARISCOMMA(2)",
         OutTemp       => RXCHARISCOMMA_OUT(2),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCHARISCOMMA(3),
         GlitchData    => RXCHARISCOMMA3_GlitchData,
         OutSignalName => "RXCHARISCOMMA(3)",
         OutTemp       => RXCHARISCOMMA_OUT(3),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCHARISK(0),
         GlitchData    => RXCHARISK0_GlitchData,
         OutSignalName => "RXCHARISK(0)",
         OutTemp       => RXCHARISK_OUT(0),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCHARISK(1),
         GlitchData    => RXCHARISK1_GlitchData,
         OutSignalName => "RXCHARISK(1)",
         OutTemp       => RXCHARISK_OUT(1),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCHARISK(2),
         GlitchData    => RXCHARISK2_GlitchData,
         OutSignalName => "RXCHARISK(2)",
         OutTemp       => RXCHARISK_OUT(2),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCHARISK(3),
         GlitchData    => RXCHARISK3_GlitchData,
         OutSignalName => "RXCHARISK(3)",
         OutTemp       => RXCHARISK_OUT(3),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCHECKINGCRC,
         GlitchData    => RXCHECKINGCRC_GlitchData,
         OutSignalName => "RXCHECKINGCRC",
         OutTemp       => RXCHECKINGCRC_OUT,
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCLKCORCNT(0),
         GlitchData    => RXCLKCORCNT0_GlitchData,
         OutSignalName => "RXCLKCORCNT(0)",
         OutTemp       => RXCLKCORCNT_OUT(0),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCLKCORCNT(1),
         GlitchData    => RXCLKCORCNT1_GlitchData,
         OutSignalName => "RXCLKCORCNT(1)",
         OutTemp       => RXCLKCORCNT_OUT(1),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCLKCORCNT(2),
         GlitchData    => RXCLKCORCNT2_GlitchData,
         OutSignalName => "RXCLKCORCNT(2)",
         OutTemp       => RXCLKCORCNT_OUT(2),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCOMMADET,
         GlitchData    => RXCOMMADET_GlitchData,
         OutSignalName => "RXCOMMADET",
         OutTemp       => RXCOMMADET_OUT,
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXCRCERR,
         GlitchData    => RXCRCERR_GlitchData,
         OutSignalName => "RXCRCERR",
         OutTemp       => RXCRCERR_OUT,
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(0),
         GlitchData    => RXDATA0_GlitchData,
         OutSignalName => "RXDATA(0)",
         OutTemp       => RXDATA_OUT(0),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(1),
         GlitchData    => RXDATA1_GlitchData,
         OutSignalName => "RXDATA(1)",
         OutTemp       => RXDATA_OUT(1),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(2),
         GlitchData    => RXDATA2_GlitchData,
         OutSignalName => "RXDATA(2)",
         OutTemp       => RXDATA_OUT(2),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(3),
         GlitchData    => RXDATA3_GlitchData,
         OutSignalName => "RXDATA(3)",
         OutTemp       => RXDATA_OUT(3),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(4),
         GlitchData    => RXDATA4_GlitchData,
         OutSignalName => "RXDATA(4)",
         OutTemp       => RXDATA_OUT(4),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(5),
         GlitchData    => RXDATA5_GlitchData,
         OutSignalName => "RXDATA(5)",
         OutTemp       => RXDATA_OUT(5),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(6),
         GlitchData    => RXDATA6_GlitchData,
         OutSignalName => "RXDATA(6)",
         OutTemp       => RXDATA_OUT(6),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(7),
         GlitchData    => RXDATA7_GlitchData,
         OutSignalName => "RXDATA(7)",
         OutTemp       => RXDATA_OUT(7),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(8),
         GlitchData    => RXDATA8_GlitchData,
         OutSignalName => "RXDATA(8)",
         OutTemp       => RXDATA_OUT(8),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(9),
         GlitchData    => RXDATA9_GlitchData,
         OutSignalName => "RXDATA(9)",
         OutTemp       => RXDATA_OUT(9),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(10),
         GlitchData    => RXDATA10_GlitchData,
         OutSignalName => "RXDATA(10)",
         OutTemp       => RXDATA_OUT(10),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(11),
         GlitchData    => RXDATA11_GlitchData,
         OutSignalName => "RXDATA(11)",
         OutTemp       => RXDATA_OUT(11),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(12),
         GlitchData    => RXDATA12_GlitchData,
         OutSignalName => "RXDATA(12)",
         OutTemp       => RXDATA_OUT(12),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(13),
         GlitchData    => RXDATA13_GlitchData,
         OutSignalName => "RXDATA(13)",
         OutTemp       => RXDATA_OUT(13),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(14),
         GlitchData    => RXDATA14_GlitchData,
         OutSignalName => "RXDATA(14)",
         OutTemp       => RXDATA_OUT(14),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(15),
         GlitchData    => RXDATA15_GlitchData,
         OutSignalName => "RXDATA(15)",
         OutTemp       => RXDATA_OUT(15),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(16),
         GlitchData    => RXDATA16_GlitchData,
         OutSignalName => "RXDATA(16)",
         OutTemp       => RXDATA_OUT(16),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(17),
         GlitchData    => RXDATA17_GlitchData,
         OutSignalName => "RXDATA(17)",
         OutTemp       => RXDATA_OUT(17),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(18),
         GlitchData    => RXDATA18_GlitchData,
         OutSignalName => "RXDATA(18)",
         OutTemp       => RXDATA_OUT(18),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(19),
         GlitchData    => RXDATA19_GlitchData,
         OutSignalName => "RXDATA(19)",
         OutTemp       => RXDATA_OUT(19),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(20),
         GlitchData    => RXDATA20_GlitchData,
         OutSignalName => "RXDATA(20)",
         OutTemp       => RXDATA_OUT(20),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(21),
         GlitchData    => RXDATA21_GlitchData,
         OutSignalName => "RXDATA(21)",
         OutTemp       => RXDATA_OUT(21),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(22),
         GlitchData    => RXDATA22_GlitchData,
         OutSignalName => "RXDATA(22)",
         OutTemp       => RXDATA_OUT(22),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(23),
         GlitchData    => RXDATA23_GlitchData,
         OutSignalName => "RXDATA(23)",
         OutTemp       => RXDATA_OUT(23),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(24),
         GlitchData    => RXDATA24_GlitchData,
         OutSignalName => "RXDATA(24)",
         OutTemp       => RXDATA_OUT(24),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(25),
         GlitchData    => RXDATA25_GlitchData,
         OutSignalName => "RXDATA(25)",
         OutTemp       => RXDATA_OUT(25),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(26),
         GlitchData    => RXDATA26_GlitchData,
         OutSignalName => "RXDATA(26)",
         OutTemp       => RXDATA_OUT(26),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(27),
         GlitchData    => RXDATA27_GlitchData,
         OutSignalName => "RXDATA(27)",
         OutTemp       => RXDATA_OUT(27),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(28),
         GlitchData    => RXDATA28_GlitchData,
         OutSignalName => "RXDATA(28)",
         OutTemp       => RXDATA_OUT(28),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(29),
         GlitchData    => RXDATA29_GlitchData,
         OutSignalName => "RXDATA(29)",
         OutTemp       => RXDATA_OUT(29),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(30),
         GlitchData    => RXDATA30_GlitchData,
         OutSignalName => "RXDATA(30)",
         OutTemp       => RXDATA_OUT(30),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDATA(31),
         GlitchData    => RXDATA31_GlitchData,
         OutSignalName => "RXDATA(31)",
         OutTemp       => RXDATA_OUT(31),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDISPERR(0),
         GlitchData    => RXDISPERR0_GlitchData,
         OutSignalName => "RXDISPERR(0)",
         OutTemp       => RXDISPERR_OUT(0),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDISPERR(1),
         GlitchData    => RXDISPERR1_GlitchData,
         OutSignalName => "RXDISPERR(1)",
         OutTemp       => RXDISPERR_OUT(1),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDISPERR(2),
         GlitchData    => RXDISPERR2_GlitchData,
         OutSignalName => "RXDISPERR(2)",
         OutTemp       => RXDISPERR_OUT(2),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXDISPERR(3),
         GlitchData    => RXDISPERR3_GlitchData,
         OutSignalName => "RXDISPERR(3)",
         OutTemp       => RXDISPERR_OUT(3),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXLOSSOFSYNC(0),
         GlitchData    => RXLOSSOFSYNC0_GlitchData,
         OutSignalName => "RXLOSSOFSYNC(0)",
         OutTemp       => RXLOSSOFSYNC_OUT(0),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXLOSSOFSYNC(1),
         GlitchData    => RXLOSSOFSYNC1_GlitchData,
         OutSignalName => "RXLOSSOFSYNC(1)",
         OutTemp       => RXLOSSOFSYNC_OUT(1),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXNOTINTABLE(0),
         GlitchData    => RXNOTINTABLE0_GlitchData,
         OutSignalName => "RXNOTINTABLE(0)",
         OutTemp       => RXNOTINTABLE_OUT(0),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXNOTINTABLE(1),
         GlitchData    => RXNOTINTABLE1_GlitchData,
         OutSignalName => "RXNOTINTABLE(1)",
         OutTemp       => RXNOTINTABLE_OUT(1),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXNOTINTABLE(2),
         GlitchData    => RXNOTINTABLE2_GlitchData,
         OutSignalName => "RXNOTINTABLE(2)",
         OutTemp       => RXNOTINTABLE_OUT(2),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXNOTINTABLE(3),
         GlitchData    => RXNOTINTABLE3_GlitchData,
         OutSignalName => "RXNOTINTABLE(3)",
         OutTemp       => RXNOTINTABLE_OUT(3),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXREALIGN,
         GlitchData    => RXREALIGN_GlitchData,
         OutSignalName => "RXREALIGN",
         OutTemp       => RXREALIGN_OUT,
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXRUNDISP(0),
         GlitchData    => RXRUNDISP0_GlitchData,
         OutSignalName => "RXRUNDISP(0)",
         OutTemp       => RXRUNDISP_OUT(0),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXRUNDISP(1),
         GlitchData    => RXRUNDISP1_GlitchData,
         OutSignalName => "RXRUNDISP(1)",
         OutTemp       => RXRUNDISP_OUT(1),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXRUNDISP(2),
         GlitchData    => RXRUNDISP2_GlitchData,
         OutSignalName => "RXRUNDISP(2)",
         OutTemp       => RXRUNDISP_OUT(2),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => RXRUNDISP(3),
         GlitchData    => RXRUNDISP3_GlitchData,
         OutSignalName => "RXRUNDISP(3)",
         OutTemp       => RXRUNDISP_OUT(3),
         Paths         => (0 => (RXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => TXBUFERR,
         GlitchData    => TXBUFERR_GlitchData,
         OutSignalName => "TXBUFERR",
         OutTemp       => TXBUFERR_OUT,
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => TXKERR(0),
         GlitchData    => TXKERR0_GlitchData,
         OutSignalName => "TXKERR(0)",
         OutTemp       => TXKERR_OUT(0),
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => TXKERR(1),
         GlitchData    => TXKERR1_GlitchData,
         OutSignalName => "TXKERR(1)",
         OutTemp       => TXKERR_OUT(1),
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => TXKERR(2),
         GlitchData    => TXKERR2_GlitchData,
         OutSignalName => "TXKERR(2)",
         OutTemp       => TXKERR_OUT(2),
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => TXKERR(3),
         GlitchData    => TXKERR3_GlitchData,
         OutSignalName => "TXKERR(3)",
         OutTemp       => TXKERR_OUT(3),
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => TXRUNDISP(0),
         GlitchData    => TXRUNDISP0_GlitchData,
         OutSignalName => "TXRUNDISP(0)",
         OutTemp       => TXRUNDISP_OUT(0),
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => TXRUNDISP(1),
         GlitchData    => TXRUNDISP1_GlitchData,
         OutSignalName => "TXRUNDISP(1)",
         OutTemp       => TXRUNDISP_OUT(1),
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => TXRUNDISP(2),
         GlitchData    => TXRUNDISP2_GlitchData,
         OutSignalName => "TXRUNDISP(2)",
         OutTemp       => TXRUNDISP_OUT(2),
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );
     VitalPathDelay01
       (
         OutSignal     => TXRUNDISP(3),
         GlitchData    => TXRUNDISP3_GlitchData,
         OutSignalName => "TXRUNDISP(3)",
         OutTemp       => TXRUNDISP_OUT(3),
         Paths         => (0 => (TXUSRCLK2_ipd'last_event, out_delay,TRUE)),
         Mode          => VitalTransport,
         Xon           => False,
         MsgOn         => False,
         MsgSeverity   => WARNING
       );

--  Wait signal (input/output pins)
   wait on
     CHBONDDONE_OUT,
     CHBONDO_OUT,
     CONFIGOUT_OUT,
     RXBUFSTATUS_OUT,
     RXCHARISCOMMA_OUT,
     RXCHARISK_OUT,
     RXCHECKINGCRC_OUT,
     RXCLKCORCNT_OUT,
     RXCOMMADET_OUT,
     RXCRCERR_OUT,
     RXDATA_OUT,
     RXDISPERR_OUT,
     RXLOSSOFSYNC_OUT,
     RXNOTINTABLE_OUT,
     RXREALIGN_OUT,
--     RXRECCLK_OUT,
     RXRUNDISP_OUT,
     TXBUFERR_OUT,
     TXKERR_OUT,
--     TXN_OUT,
--     TXP_OUT,
     TXRUNDISP_OUT,
     BREFCLK_ipd,
     BREFCLK2_ipd,
     CHBONDI_ipd,
     CONFIGENABLE_ipd,
     CONFIGIN_ipd,
     ENCHANSYNC_ipd,
     ENMCOMMAALIGN_ipd,
     ENPCOMMAALIGN_ipd,
     LOOPBACK_ipd,
     POWERDOWN_ipd,
     REFCLK_ipd,
     REFCLK2_ipd,
     REFCLKSEL_ipd,
     RXN_ipd,
     RXP_ipd,
     RXPOLARITY_ipd,
     RXRESET_ipd,
     RXUSRCLK_ipd,
     RXUSRCLK2_ipd,
     TXBYPASS8B10B_ipd,
     TXCHARDISPMODE_ipd,
     TXCHARDISPVAL_ipd,
     TXCHARISK_ipd,
     TXDATA_ipd,
     TXFORCECRCERR_ipd,
     TXINHIBIT_ipd,
     TXPOLARITY_ipd,
     TXRESET_ipd,
     TXUSRCLK_ipd,
     TXUSRCLK2_ipd;

   end process TIMING;

     TXN < = TXN_OUT;
     TXP < = TXP_OUT;
     RXRECCLK < = RXRECCLK_OUT;

end GT_V;